PLEASE CHECK.IMPORTANT

Wednesday, October 15, 2008

TECHNICAL QUESTIONS

What is pipelining?
Posted:
A technique used in advanced microprocessors where the microprocessor begins executing a second instuction before the first has been completed. That is, several instructions are in the pipeline simultaneously, each at a different processing stage.
What are the five stages in a DLX pipeline?
Posted:
The instruction sets can be differentiated by * Operand storage in the CPU * Number of explicit operands per instruction * Operand location * Operations * Type and size of operands
What are the different hazards? How do you avoid them?
Posted:
There are situations, called hazards, that prevent the next instruction in the instruction stream from executing during its designated clock cycle. Hazards reduce the performance from the ideal speedup gained by pipelining. There are three classes of Hazards: 1. Structural Hazards: It arise from resource conflicts when the hardware cannot support all possible combinations of instructions [...]
How do you handle precise exceptions or interrupts?
Posted:
Like java have a feature for handling exception handling “prime catch”.the exception like divide by zero,out of bound.
What is a cache?
Posted:
It turns out that caching is an important computer-science process that appears on every computer in a variety of forms. There are memory caches, hardware and software disk caches, page caches and more. Virtual memory is even a form of caching. Caching is a technology based on the memory subsystem of your computer. The main purpose [...]
What is Virtual Memory?
Posted:
Virtual memory is a concept that, when implemented by a computer and its operating system, allows programmers to use a very large range of memory or storage addresses for stored data. The computing system maps the programmer’s virtual addresses to real hardware storage addresses. Usually, the programmer is freed from having to be concerned about [...]
What is Cache Coherency?
Posted:
Cache coherence refers to the integrity of data stored in local caches of a shared resource. Cache coherence is a special case of memory coherence. When clients in a system, particularly CPUs in a multiprocessing system cache occurs.
Convert 65(Hex) to Binary ?
Posted:
65 to decimal 65/16=4 remainder=1 ==41 decimal decimal to binary 101001
Convert a number to its two?s compliment and back?
Posted:
First convert a number into binary format. Then keep last binary number as it is & complement all others. Eg:- 1101001 2’s Compl:0010111
The CPU is busy but you want to stop and do some other task. How do you do it?
Posted:
Arise a non maskable interrupt. Then give jump instruction to required subroutine.
What is the difference between interrupt service routine and subroutine ?
Posted:
Subroutine are the part of executing processes(like any process can call a subroutine for achieve task),while the interrupt subroutine never be the part.interrupt subroutine are subroutine that are external to a process.

http://placementhelpdesk.blogspot.com/

No comments: